Master the Art of Chip Layout from Netlist to GDSII
Physical Design is a critical stage in the VLSI flow where the synthesized netlist is converted into a geometric representation (GDSII) for fabrication. Our industry-oriented curriculum is designed to transform you into a skilled Physical Design Engineer capable of handling complex blocks in 7nm/5nm technology nodes.
You will work on real industry-standard tools and projects, learning to balance Power, Performance, and Area (PPA) trade-offs.
